If you’ve ever looked into computer memory, you might’ve come across some weird acronyms. RAM, DRAM, SDRAM, DDR, DDR2, DDR3, and so on. You know they’re supposed to be the memory, but you don’t know the difference and now you’re just confused. Here’s a short bit on what you need to know about computer memory.

A DDR3, which stands for the third generation of double data rate that is used to store program code data. Out of the three options, it’s the one you’re better off getting. DDR3 is currently the most standard memory you can get for your computer memory or RAM, random access memory. To be more specific, DDR3 is the current standard for SDRAM, synchronous random-access memory.

Developed in the 1990s, SDRAM was developed to address the inadequacies of DRAM. DRAM was an asynchronous interface, which meant that it operated independently of the processor, which meant that it was slow. SDRAM streamlined the process by synchronizing the memory process to control inputs, so it could queue one process while waiting for another and therefore execute more tasks much more quickly. Eventually, SDRAM, which was operating via a single data rate interface was too slow and replaced with the DDR or double data rate. DDR could transfer data on both the rising and falling edges of the clock signal, operating at nearly twice the speed of the SDRAM. This leads the revelation that memory could run at a lower clock rate, use less energy, and achieve faster speeds.

Eventually, as processors became more powerful, DDR also became insufficient and by 2003, the DDR2 was introduced. Continued advancements in technology drove the demand for faster, more powerful processors and memory with DDR2. So, the cycle continued with DDR3 in 2007. In 2014, the DDR4 was introduced, and 2019 is expected to see the DDR5. Currently, DDR3 is the base standard, but with DDR5 on its way, that could change. Hopefully, now you know a bit more about memory and the acronyms make more sense. 

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On August 31, 2016 Lucas Mearian wrote an article for Computer World talking about how Fujitsu Semiconductor Ltd has unveiled its new RAM that is 1000 times the performance of DRAM. Not only this, but Fujitsu also announced that the data is stored like the NAND flash memory.

This new type of ram is considered a nano ram or NRAM, which is based off of carbon nanotube technology.

In terms of production, Fujitsu Semiconductor plans to create a new type of memory module that uses custom embedded storage class with a DDR4 implementation. This new type of memory module will has a projected target date of 2018. With this memory the company plans to utilize this in order to expand its product line so that NRAM has the ability to stand alone as Fujitsu’s foundry, Mie Fujitsu Semiconductor Ltd. Resellers will then use this and rebrand it.

Here is what Mearian has told viewers what Greg Schmergel, CEO of Nantero, has to say about Fujitsu. “Fujitsu plans to initially manufacture the NRAM using a 55-nanometer (nm) process, which refers to the size of the transistors used to store bits of data. At that size, the initial memory modules will only be able to store megabytes of data. However, the company also plans a next-generation 40nm-process NRAM version.”

Schmergel also talks about the DIMM manufacturer and the stand alone memory. "There are several others [fabricators] we are still working with, and one, for example, is focused on a 28nm process and that's a multi-gigabyte stand-alone memory product."

If you are interested in getting new type of Fujitsu memory module, please feel free to contact our friendly sales staff at sales@asap-memory.com or call us at toll free at 1-714-705-4780. Save

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International Business Machines Corporation, commonly referred to as IBM, has recently unveiled an innovative new way to create a cheaper alternative to DRAM, as the company has been developing techniques to make enterprise data centers more dense. Designed to be less expensive than DRAM and faster than flash, phase-change memory, or PCM, is one of the several new emerging technologies. Phase-change memory has the potential to provide consumers as well as enterprises with faster access to data with lower costs; but prior to this happening, there are challenges which must be dealt with first.

One of these challenges is density, and the International Business Machines Corporation has said that they have achieved a new high in that area. The company has developed a version of phase-change memory which can host three bits on each cell. In 2011, the International Business Machines Corporation showed off a two-bit form of phase change memory; this three-bit form provides for 50% more density, allowing the International Business Machines Corporation to fully utilize the phase-change memory’s capacity, which still happens to be a pricey technology.

“PCM works by changing a glass-like substance from an amorphous to a crystalline form using an electrical charge. Like NAND flash, it keeps storing data when a device is turned off, which DRAM can’t do,” explains Stephen Lawson from Computer World. “But PCM responds to requests for data more quickly than flash: In less than one microsecond, compared with 70 microseconds, according to IBM. It also lasts longer than flash, for at least 10 million write cycles versus about 3,000 cycles for an average flash USB stick.

Phase-change memory has already been delivered in a few products, though on a relatively small scale. This small scale usage is due to the fact that phase-change memory remains to be more expensive than DRAM. At its current state, there has not been much reason to use phase-change memory, though this small scale iteration may possibly get the ball rolling to make phase-change memory a broader success.

“IBM added two features to make the new form of PCM possible. One is a way to adjust for so-called “drift,” which can gradually degrade the memory’s ability to store the right values. The other counters the effects of heat on PCM so it can run reliably in normal system temperatures,” Lawson added.

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Researchers at International Business Machines, commonly referred to as IBM, have recently announced a significant breakthrough in phase-change memory. Scientists and researchers have spent several years searching for a non-volatile memory standard which is faster than NAND flash that simultaneously provides superior power characteristics, better longevity, as well as higher densities.

Phase change memory has been in development and seems to be one of the more promising technologies. IBM researchers have declared that they have discovered an innovative way to store up to three bits of data per “cell” of memory. Past work in the field has been limited to a single bit of data per memory cell.

“Phase change memory exploits the properties of a metal alloy known as chalcogenide. Applying heat to the alloy changes it from an amorphous mass into a crystal lattice with significantly different properties,”

said Joel Hruska from Extreme Tech. Scientists have long known that chalcogenide could exist in states between crystal lattice or amorphous, but building a solution that could exploit these in-between states to store more memory has been extremely difficult. While phase-change memory works on very different principles than NAND flash, some of the problems with scaling NAND density are conceptually similar to those faced by PCM.

“Storing multiple bits of data in NAND flash is difficult because the gap between the voltage levels required to read each specific bit is smaller the more bits you store. This is also why TLC NAND flash, which stores three bits of data per cell, is slower and less durable than MLC (2-bit) or SLC (single bit) NAND,” Hruska added.

Researchers at IBM have found new ways of storing three bits of data in a 64K array for one million endurance cycles as well as at elevated temperatures.

“Phase change memory is the first instantiation of a universal memory with properties of both DRAM and flash, thus answering one of the grand challenges of our industry,” said a researcher from IBM, Dr. Haris Pozidis. Dr. Pozidis is the manager of non-volatile memory research for IBM Research. “Reaching 3 bits per cell is a significant milestone because at this density the cost of PCM will be significantly less than DRAM and closer to flash.”

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